An Analog LDPC Codec Core

Motivated by the potential to reuse the architecture in place for an analog sum-product decoder, and thus reduce circuit space, we show how an encoder may be constructed for a class of reversible LDPC codes. We review the design of the analog sum-product decoder for subthreshold CMOS current mode operation and then show how the architecture may be reused for encoding. The encoder circuit operates by performing the Jacobi method for iterative matrix inversion of finite field matrices. We investigate both continuous and discrete time approaches. With the addition of only simple components into the sum-product decoder variable nodes, we provide a novel design for a time multiplexed analog codec.